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  1/8 may 2001 STN1HNC60 n-channel 600v - 7 w - 0.4a - sot-223 powermesh?ii mosfet n typical r ds (on) = 7 w n extremely high dv/dt capability n 100% avalanche tested n new high voltage benchmark n gate charge minimized description the powermesh ? ii is the evolution of the first generation of mesh overlay ?. the layout re- finements introduced greatly improve the ron*area figure of merit while keeping the device at the lead- ing edge for what concerns swithing speed, gate charge and ruggedness. applications n ac adaptors and battery chargers n swith mode power supplies (smps) n dc-ac converters for welding equipment absolute maximum ratings (?)pulse width limited by safe operating area type v dss r ds(on) i d STN1HNC60 600 v < 8 w 0.4 a symbol parameter value unit v ds drain-source voltage (v gs = 0) 600 v v dgr drain-gate voltage (r gs = 20 k w ) 600 v v gs gate- source voltage 30 v i d drain current (continuos) at t c = 25c 0.4 a i d drain current (continuos) at t c = 100c 0.25 a i dm (1) drain current (pulsed) 1.6 a p tot total dissipation at t c = 25c 2.5 w derating factor 0.02 w/c dv/dt peak diode recovery voltage slope 3.5 v/ns t stg storage temperature C65 to 150 c t j max. operating junction temperature 150 c (1)i sd 0.4a, di/dt 100a/s, v dd v (br)dss , t j t jmax 1 2 2 3 sot-223 internal schematic diagram
STN1HNC60 2/8 thermal data avalanche characteristics electrical characteristics (tcase = 25 c unless otherwise specified) off on (1) dynamic rthj-pcb rthj-amb t l thermal resistance junction-pc board thermal resistance junction-ambient max maximum lead temperature for soldering purpose 50 60 300 c/w c/w c symbol parameter max value unit i ar avalanche current, repetitive or not-repetitive (pulse width limited by t j max) 0.4 a e as single pulse avalanche energy (starting t j = 25 c, i d = i ar , v dd = 50 v) 100 mj symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 600 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating 1a v ds = max rating, t c = 125 c 50 a i gss gate-body leakage current (v ds = 0) v gs = 30v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds = v gs , i d = 250a 234v r ds(on) static drain-source on resistance v gs = 10v, i d =0.7 a 78 w symbol parameter test conditions min. typ. max. unit g fs (1) forward transconductance v ds > i d(on) x r ds(on)max, i d = 0.7a 1.25 s c iss input capacitance v ds = 25v, f = 1 mhz, v gs = 0 160 pf c oss output capacitance 26 pf c rss reverse transfer capacitance 3.8 pf
3/8 STN1HNC60 electrical characteristics (continued) switching on switching off source drain diode note: 1. pulsed: pulse duration = 300 s, duty cycle 1.5 %. 2. pulse width limited by safe operating area. symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on delay time rise time v dd = 300v, i d = 0.7a r g = 4.7 w v gs = 10v (see test circuit, figure 3) 8 8 ns ns q g total gate charge v dd = 480v, i d = 1.4a, v gs = 10v 8.5 11.5 nc q gs gate-source charge 2.8 nc q gd gate-drain charge 2.8 nc symbol parameter test conditions min. typ. max. unit t r(voff) off-voltage rise time v dd = 480v, i d = 1.4a, r g =4.7 w, v gs = 10v (see test circuit, figure 5) 25 ns t f fall time 9 ns t c cross-over time 34 ns symbol parameter test conditions min. typ. max. unit i sd source-drain current 0.4 a i sdm (2) source-drain current (pulsed) 1.6 a v sd (1) forward on voltage i sd = 0.4 a, v gs = 0 1.6 v t rr reverse recovery time i sd = 1.4a, di/dt = 100a/s, v dd = 100v, tj = 150c (see test circuit, figure 5) 500 ns q rr reverse recovery charge 950 nc i rrm reverse recovery current 3.8 a thermal impedance safe operating area
STN1HNC60 4/8 transconductance static drain-source on resistance output characteristics transfer characteristics gate charge vs gate-source voltage capacitance variations
5/8 STN1HNC60 source-drain diode forward characteristics normalized on resistance vs temperature normalized gate thereshold voltage vs temp.
STN1HNC60 6/8 fig. 5: test circuit for inductive load switching and diode recovery times fig. 4: gate charge test circuit fig. 2: unclamped inductive waveform fig. 1: unclamped inductive load test circuit fig. 3: switching times test circuits for resistive load
7/8 STN1HNC60 dim. mm inch min. typ. max. min. typ. max. a 1.80 0.071 b 0.60 0.70 0.80 0.024 0.027 0.031 b1 2.90 3.00 3.10 0.114 0.118 0.122 c 0.24 0.26 0.32 0.009 0.010 0.013 d 6.30 6.50 6.70 0.248 0.256 0.264 e 2.30 0.090 e1 4.60 0.181 e 3.30 3.50 3.70 0.130 0.138 0.146 h 6.70 7.00 7.30 0.264 0.276 0.287 v10 o 10 o a1 0.02 p008b sot-223 mechanical data
STN1HNC60 8/8 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsib ility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectroni cs. specifi cation mentio ned in this publication are subject to change without notice. this publication supersedes and replaces all in formation previou sly supplied. stmicroe lectron ics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectron ics. the st logo is a trademark of stmicroelectronics ? 2001 stmicroelectronics C pr inted in italy C all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malay sia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. http://www.st.com


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